Re:Ask HN: Where do I get started on ASICs, FPGA, RTL, Veril...
by _benj on Monday October 02, 2017 @09:22AM
(#15383583)
> then just a matter of fighting the Xilinx/Altera/Lattice tools until then give you a bitstream
Haha! So true :-)
I have to give some credit to Altera tho because after sort of step learning curve you can start generating "IP Cores" with QSys and Tcl scripts to stop clicking on the same icons all day long!
Haha! So true :-) I have to give some credit to Altera tho because after sort of step learning curve you can start generating "IP Cores" with QSys and Tcl scripts to stop clicking on the same icons all day long!