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Re:Ask HN: Where do I get started on ASICs, FPGA, RTL, Veril... by sliverstorm on Sunday October 01, 2017 @11:14PM (#15381491)
But, if you want to make a high performance netlist, I'd argue you want to know all about logic gates, Boolean math, and all the rest. HDL stands for "hardware description language", and you'll only write good HDL if you know what you're writing looks like in gates.

(Though if you're just making an LED blink when you push a button, you don't need to write good HDL)

Re:Ask HN: Where do I get started on ASICs, FPGA, RTL, Veril... by dreamcompiler on Monday October 02, 2017 @05:01AM (#15382544)
Seconded. The way FPGAs work internally is not really how gate-based (dedicated) chips work internally. FPGAs simulate gates with static RAM tables.