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A comment on Hardware Architectures for Deep Neural Networks [pdf]. Parent comment

Re:Hardware Architectures for Deep Neural Networks [pdf] by metaphor on Wednesday September 06, 2017 @10:50PM (#15188828)
Do you have a specific reference?

This Mead paper[1] suggests "...a factor of 10 million more efficient than the best digital technology that we can imagine"...which I interpreted as a gross approximation at the chip level assuming 10nm process, not considering any particular architecture, and doesn't include roughly 2-3 orders of magnitude reduced efficient at the system level.

[1] http://authors.library.caltech.edu/53090/1/00058356.pdf

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Re:Hardware Architectures for Deep Neural Networks [pdf] by bobsil1 on Thursday September 07, 2017 @10:09PM (#15197406)
That was the paper I was thinking of (thanks), but maybe the figure is from an IBM True North paper. I vaguely recall 10^-5 for brain efficiency, 10^-4 for True North vs. von Neumann.
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