Even the IBM machines were flagging in performance in 1990. That was the beginning of the RISC revolution, and all the benchmark records were being taken by MIPS (and later Alpha) boxes. It was a slower process than the Intel takeover[1] only because ECL logic was still available to expensive machines, allowing clock rates in the mainframe world to stay higher than CMOS chips even as their architectures got eclipsed.

[1] Ironically on the back of a "CISC" architecture. What happened there was that CMOS density had gotten so high that the relative advantage of a RISC ISA (not architecture: every thing form the P6 onward looks like a pipelined RISC box on the inside) was just a pipeline stage or two and a 1% hit in the transistor budget for decode.