Typically, a digital chip such as this is designed with Verilog (or VHDL in europe) for RTL. Most hardware compilers then also provide test vectors (for registers and logic) and built in boundary scan through SPI. When contracting the chip your in-house design software then generates GDS (semiconductor mask design format) which you provide to the vendor. Even without obfuscation, it would be enormously difficult to reverse engineer enough of the design to pass the boundary scan test vectors. Certainly, after manufacture you can decap and check that the product matches the mask.

There are various extra design and production steps I'd go through for crypto verification and test, but it would be difficult to fake a chip if they allow verification after SMT on the PCB. After that, physical access and fairly sophisticated methods could bypass it, but you're already trusting TehGoog... so NoSuchAgency shouldn't be your concern.

Unfortunately this is still susceptible to attacks like this: http://jantsch.se/AxelJantsch/papers/2016/ChristianKrieg-ICC...

Which is focused on attacking an FPGA, however the general idea of injecting hard to detect hardware via the tools themselves is a real problem.

Thanks so much! I had to google a few terms but this is a great explanation, and I learned something today.. I love HN for this. :)

There are supposedly attacks that cannot be detected by visual inspection (I realize that this was only part of your argument), eg:

sharps.org/wp-content/uploads/BECKER-CHES.pdf

I'm not sure what Google does, but there are companies out there that help detect counterfeit hardware in bulk parts shipments. They will chose random samples from a batch and crack them open to compare with what they expect.

EDIT: example company that does this: http://velocityelec.com/