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Re:Intel Reveals Post-8th Gen. Core Architecture 10nm+ Ice Lake by nhaehnle on Wednesday August 16, 2017 @04:18AM (#15025800)
People are already stacking multiple layers today for memory, although the layers are always manufactured separately and then bonded together in a separate step.

I wouldn't be surprised to see more of that in the future, think caches on top of cores, but I doubt we'll ever see multiple layers of transistors produced in a single step. Technical challenges aside, the economics of trying to produce multiple layers at once are just always going to be worse: higher latency from a wafer entering a fab to finishing the wafer, and much higher rate of defects. (When you produce the layers separately, you can potentially test them separately before putting them together, which is a huge win for defect rate.)

It's possible that manufacturing multiple layers at once might eventually allow for a higher density of vertical interconnects, but I just don't see that becoming the deciding factor.

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