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Re:All AMD ThreadRipper CPU's will have 64 PCIe Lanes by drewg123 on Wednesday May 31, 2017 @11:40AM (#14453350)
I do a lot of compiles of a codebase which is pretty big (Netflix version of FreeBSD). A full recompile takes me ~1 hr on my box (Xeon E5-2630 v3, 8 cores, 16 threads, 32GB DDR4). Most of this is a parallel make that is 100% CPU bound. So I'm probably going to update to thread ripper when it comes out. Doubling my core count should come close to halving my compile times.

I probably will do storage via a ZFS array of small-ish SSDs or NVME drives. I started with a ZFS array of spinning drives when I built this machine ~2 years ago, with an SSD for L2 ARC. I was occasionally IO bound, so I moved most of the build stuff onto its own SSD. That's probably enough, but I want redundancy (without spinning drives to back up to), and I suck at cabling, so I'm leaning towards just using NVME drives in PCIe slots in order to avoid the cables.

Re:All AMD ThreadRipper CPU's will have 64 PCIe Lanes by maksimum on Wednesday May 31, 2017 @02:03PM (#14454605)
> A full recompile takes me ~1 hr

Could you explain why full recompiles on a single machine are necessary? Are you testing different compiler settings?

Re:All AMD ThreadRipper CPU's will have 64 PCIe Lanes by drewg123 on Wednesday May 31, 2017 @03:14PM (#14455126)
I work remotely, and it is easier to develop and compile on the same box. I normally compile just the kernel, but occasionally have to rebuild the entire thing.
Re:All AMD ThreadRipper CPU's will have 64 PCIe Lanes by yazr on Wednesday May 31, 2017 @03:28PM (#14455225)
What makefile/build system r u using ?

I am curious since i did some work on parallel builds and I always wonder how much of this is (easily) transferable to other setups...

Re:All AMD ThreadRipper CPU's will have 64 PCIe Lanes by drewg123 on Wednesday May 31, 2017 @04:07PM (#14455498)
A modified version of the standard FreeBSD build, with bsd make. Eg, a script driven 'make -j X buildworld && make -j X buildkernel'
Re:All AMD ThreadRipper CPU's will have 64 PCIe Lanes by yazr on Thursday June 01, 2017 @02:43PM (#14463184)
if you had access to a hosted build system, which is x10 faster. lets even assume some sort of transparent gradual sync of your source tree, and the binaries back to your system.

would u find value in such a setup or is it not worth the hassle ?

(lets assume the output is veritably binary-identical to your local build)