Inside the Microsoft FPGA-based configurable cloud [video]

Re:Inside the Microsoft FPGA-based configurable cloud [video] by samuell on Wednesday May 17, 2017 @11:29AM (#14359403)

Tried to scan the video to see if they have any support for reconfigure.io [1] (Code FPGAs with Go concurrency primitives). Didn't see any mention. Anybody knows more? Or I'll have to watch the vid in detail ... looks pretty pedagogic anyways :) ...

[1] https://reconfigure.io/

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Re:Inside the Microsoft FPGA-based configurable cloud [video] by monocasa on Wednesday May 17, 2017 @11:36AM (#14359471)

In general, code meant for sequential processors (even massively parallel sequential processors) doesn't really translate into the potential gains you see from FPGAs. I'm pretty skeptical that this gives you any gains.

Even OpenCL->HDL wasn't the huge boon it was supposed to be.

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Re:Inside the Microsoft FPGA-based configurable cloud [video] by thesz on Wednesday May 17, 2017 @11:45AM (#14359579)

1) You're right. The problem here is the unpredictability of the buffer's size - it's equivalent to halting problem in general. You miss just one item in the buffer and you risk circuit not working at random times.

2) OpenCL->HDL takes hours to complete due to need to synthesize, whereas OpenCL->CPU code takes seconds at worst. The time to get working (synthesized) code is major blocking factor in utilizing FPGAs anywhere.

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Re:Inside the Microsoft FPGA-based configurable cloud [video] by mmalone on Wednesday May 17, 2017 @12:02PM (#14359782)

Do you think pure paradigms could be mapped, or are you skeptical of any general purpose language being able to efficiently compile to FPGAs _and_ CPUs (and GPUs)?

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Re:Inside the Microsoft FPGA-based configurable cloud [video] by willyyr on Wednesday May 17, 2017 @12:35PM (#14360114)

I've watched the whole video, no mention about this.

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