Intel releases the last Itanium chip, the 9700

Re:Intel releases the last Itanium chip, the 9700 by thesz on Saturday May 13, 2017 @02:15PM (#14332214)

As a developer of out-of-order CPU (model, but studied the effects on real code and did my best to make it synthesable) I can assure you there's a lot of ILP to extract even from ordinary programs.

The problem with Itanium is that it wasn't OoO and can't be made such.

Just to give you a hint - just computing various kinds of addresses in advance can make huge difference. Compute branch address, issue a fetch, compute load address, issue a fetch (even when destination register is blocked). Voila! Your program is sped up significantly.

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Re:Intel releases the last Itanium chip, the 9700 by gsg on Saturday May 13, 2017 @02:48PM (#14332354)

Itanium did have features for various kinds of speculation, though. You could load from an address even if it were potentially aliased with a subsequent store, with the processor doing a dynamic check to make sure the right value was observed (eg, performing a late load and blocking if it turned out there was an overlapping store).

It wasn't as effective as OoO in the end, but not for lack of attention to the problem.

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