Re:Intel releases the last Itanium chip, the 9700
by CyberDildonics on Saturday May 13, 2017 @12:30PM
(#14331735)
Actually it is 16 floating point operations in one AVX512 instruction and each core has two units, making 32 flops if you are running two or more threads (each core can do 4 way SMT but can also only decode two instructions per cycle).
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Re:Intel releases the last Itanium chip, the 9700
by KenoFischer on Saturday May 13, 2017 @12:34PM
(#14331746)
I was counting FMA as 2 operations ;).
Re:Intel releases the last Itanium chip, the 9700
by CyberDildonics on Saturday May 13, 2017 @12:46PM
(#14331794)
That's Intel marketing and is somewhere between deceptive and wrong. Intel uses that to claim inflated maximum flops, with the huge aside that you would have to be doing nothing but fused multiply add, which is absurd.
Re:Intel releases the last Itanium chip, the 9700
by jabl on Sunday May 14, 2017 @03:38AM
(#14334687)
AFAICS everybody has been doing that long before Intel, so in their defense they're just following precedent.
But yes, outside of carefully tuned kernels (e.g. GEMM and FFT), you're not going to see a 2x speedup. But that's no different from many other ISA extensions.