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Re:Deterministic Components for Interactive Distributed Systems by fapjacks on Monday May 08, 2017 @07:45PM (#14296598)
I thought the format of the information presented on this site would make the information hard to consume, but for some reason, it was the opposite.
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Re:Deterministic Components for Interactive Distributed Systems by camkego on Monday May 08, 2017 @11:14PM (#14297477)
Looks awesome, any chance the a video of the presentation is, or will be available?
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Re:Deterministic Components for Interactive Distributed Systems by camkego on Tuesday May 09, 2017 @02:48PM (#14302810)
It is also worth noting this seems like it relates to the way hardware RTL (VHDL/Verilog) designers basically build and test their systems. I think that software developers in general have a few things to learn from the hardware guys about testing.
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Re:Deterministic Components for Interactive Distributed Systems by ramchip on Wednesday May 10, 2017 @07:52PM (#14312797)
> I think that software developers in general have a few things to learn from the hardware guys about testing.

People say that a lot, but do you have any concrete suggestions?

I find there's a big difference between testing when it's half your budget (HW), and when it's 10 or 20% (SW).

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Re:Deterministic Components for Interactive Distributed Systems by krupan on Wednesday May 10, 2017 @08:27AM (#14307615)
Are you sure?

http://insights.sigasi.com/opinion/jan/verilogs-major-flaw.h...

(tl;dr Verilog itself is non-deterministic)

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