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A comment on VHDL or Verilog?. Parent comment

Re:VHDL or Verilog? by odmkSeijin on Sunday May 07, 2017 @09:01AM (#14285253)
Uh, yes, that is all true (except maybe the processor with feedback bit is debatable..). I agree with all this, and yet my arguments for why C++ HLS is a good thing remain the same.
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