News for hackers. Stuff that matters.

A comment on VHDL or Verilog?.

Re:VHDL or Verilog? by sunmag on Monday May 01, 2017 @09:55AM (#14237451)
Vhdl + vunit. HLS will (latency/bandwidth)-wise do equally good, provided you have some spare resources(large enough fpga).
[ Parent | on HN ]

There are no comments on this comment yet.