"The developer FPGA code is enclaved inside AWS FPGA Shell, to prevent malicious FPGA code from damaging the hardware and to provide the necessary protection for PCI Express and the host machine. The pin assignment of the FPGA is controlled by AWS."

And

"AWS infrastructure monitors the thermals as well and the F1 hardware was designed to sustain high power consumption to enable developers to utilize the maximal available FPGA resources and frequency."

your design sits inside a wrapper with access to IO blocks.

inside the FPGA logic, you cannot do electrical damage, no matter how hard you try.

I'd be a little worried about people making ring oscillators and driving them from the fastest possible output from a DCM. That used to be a hazard, not sure if it still would be at the UltraScale level of play.

Or creating a configurable DCM or PLL and then setting it up with illegal values at runtime, when the synthesis tool won't notice...

Damage is probably more of a risk for an external I/O, but it's still a possibility for an internal I/O. Probably more of a certainty with a malicious programmer.

Who's going to be the first person to design an on-die switched capacitor voltage multiplier, using parasitic capacitance between gates as the energy storage, and use it drive an internal high impedance input to a damaging level?

so basically you cannot burn FPGA by making a short-circuit