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Re:Thanks for the memory: How cheap RAM changes computing by valarauca1 on Monday October 17, 2016 @08:28AM (#12724406)
>> modern consoles (games, graphics if you will) is which RAM?

Except the modern console generation doesn't have dedicated GPU RAM. They are using AMD APU's that unify System/GPU ram.

Re:Thanks for the memory: How cheap RAM changes computing by Keyframe on Monday October 17, 2016 @08:31AM (#12724432)
You're right, with on PS4 it being GDDR5. It leaned towards graphics, not system, requirements. Not exactly the breed you'd find in regular stuff.
Re:Thanks for the memory: How cheap RAM changes computing by valarauca1 on Monday October 17, 2016 @08:55AM (#12724568)
The primary difference between GDDR and DDR is 128bit vs 64bit bus. GDDR is also normally SRAM, but DDR can be SRAM, but it is normally DRAM.

Saying one is geared to graphics is just marketing.

Re:Thanks for the memory: How cheap RAM changes computing by xenadu02 on Monday October 17, 2016 @11:35AM (#12725956)
I think you meant SDRAM not SRAM?
Re:Thanks for the memory: How cheap RAM changes computing by Keyframe on Monday October 17, 2016 @09:11AM (#12724655)
So why did they choose GDDR then?
Re:Thanks for the memory: How cheap RAM changes computing by valarauca1 on Monday October 17, 2016 @09:34AM (#12724800)
I'm not Sony Engineering so IDFK

GDDR5 trades latency for thoughtput

XboxONE DDR3: 68GB/s CAS 7

PS4: GDDR5: 127GB/s CAS 15

The reason GDDR is normally used in GPU's is the workloads are more predictive, you are doing the same calculation thousands of times, just iterating across a buffer. This is why SIMD/Cache prefetching shine in GPU's. It makes memory latency not as important.

Re:Thanks for the memory: How cheap RAM changes computing by Keyframe on Monday October 17, 2016 @11:06AM (#12725618)
So, you're saying GDDR is more geared towards operations done commonly in graphics? ;)
Re:Thanks for the memory: How cheap RAM changes computing by valarauca1 on Tuesday October 18, 2016 @12:16PM (#12735923)
No. I'm saying it is gear to work loads with easily predictable or cache-able memory access patterns.