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A comment on Epiphany-V: A 1024-core 64-bit RISC processor. Parent comment
It might be easier to work around broken SRAM bits than just skipping a whole core.
That way you could always have same pipeline layout and not need to compute it dynamically.
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It might be easier to work around broken SRAM bits than just skipping a whole core.
That way you could always have same pipeline layout and not need to compute it dynamically.