The cool thing about open-source CPU's is one can always improve on them to, say, have an extra dozen cores on more recent nodes. Like Oracle does but probably less impressive with less money.
Somebody tried to use a university department's T2 because it was unused and reasonably parallel for some experiment on hashing.
Single core SHA1 speed on a t2 was ~300KB/s or so. Even with its 32 threads I recommended going for any ancient desktop that happened not to be used for a couple of days because the experiment would finish much faster there. Those desktops were about Core Duo class and managed 50-100MB/s SHA1 throughput (I think, it's been a couple of years).
"SPARC chips before T4 under-perform on GMP. This is not because the GMP code is inadequately optimised for SPARC, but due to the basic v9 ISA as well as the micro-architecture of these chips. The T1 and T2 chips perform worse than any other SPARC chips; they compare to a 15 year older 486 chip."
ouch!
Note: There's always my other recommendation of turning open-source Leon3 into a multicore. Im curious what it or Leon4 get on such a benchmark versus Intels on similar process nodes.
http://www.oracle.com/technetwork/systems/opensparc/openspar...
The ASIC implementation was nice:
https://en.wikipedia.org/wiki/UltraSPARC_T2
On a 65nm node... very outdated one... it might get 8 threads in 8 cores at 1.6GHz each with hardware RNG, crypto accelerators, and hypervisor support. That's the kind of implementation that would be useless for an open-source, secure workstation, server, or HPC node. ;) Especially if one slightly increased single-core performance or cache when porting it to 45nm.
Forget that, though. Let's see what IBM will charge for their admittedly-faster pile of complicated silicon that only certain people can see which they've already turned into non-backdoored chips for you. ;)