Re:Ask HN: Why are modern Intel CPUs not getting a lot more ...
by valarauca1 on Wednesday August 17, 2016 @10:22AM
(#12304890)
Zen is going to have an integrated memory controller/PCIe root complex on dye. So this should help with IO concerns (no north bridge). Ofc this is gen 1 tech so who knows it could be crippled for certain tasks.
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Re:Ask HN: Why are modern Intel CPUs not getting a lot more ...
by dogma1138 on Wednesday August 17, 2016 @01:25PM
(#12306449)
Intel does the same, there is still a "north/south bridge" (AMD had on die memory controller since the Athlon 64 days IIRC) which adds "additional" (via a bridge, you aren't getting additional bandwidth unless you are using QPI with multiple CPU's) PCIE lanes and centralizes I/O in Intel's case it's the PCH. https://en.wikipedia.org/wiki/Platform_Controller_Hub
AMD will have something similar even if the CPU will control most of the PCIE lanes in the system (usually GPU + high speed storage is over the CPU, the rest of the IO is over the PCH).