Normally when you think of an ASIC, you think of a single chip custom-designed for a single customer/buyer. You don't think of a single chip with multiple totally different functions and designs consolidated onto it, which get enabled only if they're shipped to the particular customer who requested that particular function. This is like the CPU/GPU core stuff but on steroids - not just 1 or 2 cores disabled to do yield management and price discrimination, but entire processors.