Re:Samsung Demos Its First BGA SSD: 1500 MB/s Read Speed and...
by oakwhiz on Thursday June 02, 2016 @08:02AM
(#11821802)
Why not just use a lower PCI Express version? You might lose some speed but it will be backwards compatible with the lower clocks.
Re:Samsung Demos Its First BGA SSD: 1500 MB/s Read Speed and...
by haneefmubarak on Wednesday June 01, 2016 @09:01AM
(#11813994)
Actually, both Xilinx and Altera offer PCIe v3.0 blocks on their high end FPGAs (Virtex 7/Kintex 7 and Arria 10/Stratix V).
Re:Samsung Demos Its First BGA SSD: 1500 MB/s Read Speed and...
by sklogic on Wednesday June 01, 2016 @09:13AM
(#11814066)
Yes, of course, but this is already a little bit beyond the DIY budget I hoped for.
Re:Samsung Demos Its First BGA SSD: 1500 MB/s Read Speed and...
by cottonseed on Wednesday June 01, 2016 @10:05AM
(#11814413)
I made a Kintex 7 board in my homemade reflow oven and 2/2 worked. I had more trouble with the QFN I used for the core power supply than the FPGA.
Re:Samsung Demos Its First BGA SSD: 1500 MB/s Read Speed and...
by sklogic on Wednesday June 01, 2016 @10:11AM
(#11814458)
I'm more concerned about a budget here than a reflow. Cheapest Kintex 7 part is around £90.
Re:Samsung Demos Its First BGA SSD: 1500 MB/s Read Speed and...
by haneefmubarak on Wednesday June 01, 2016 @09:23AM
(#11814121)
Ah I missed the part about DIY - that sucks though.
You seem to be familiar with PCIe 2 though, so now I'm wondering - is there a chip that could convert the 1x PCIe 3 lane into a 2x or 4x PCIe 2 set of lanes? Also, worst case, if you really wanted to use this chip, couldn't you just use the chip with PCIe 2 (albeit slower, but I think revisions of PCIe are supposed to be cross compatible)?
Re:Samsung Demos Its First BGA SSD: 1500 MB/s Read Speed and...
by sklogic on Wednesday June 01, 2016 @10:01AM
(#11814383)
> is there a chip that could convert the 1x PCIe 3 lane into a 2x or 4x PCIe 2 set of lanes?
Never heard of such a thing, although it might have been really useful.
> couldn't you just use the chip with PCIe 2
Did not even think of this option, sounds interesting. I guess we should wait for the datasheet for this chip to be sure.
EDIT: actually, no, it's a single lane PCIe3, such clock rates are well beyond the FPGA range. Pity.