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Re:Google supercharges machine learning tasks with TPU custo... by zenlikethat on Thursday May 19, 2016 @02:26AM (#11728410)
> You can make some assumptions though. If the power consumption was equal, the performance is 10x.

While I agree some performance per unit increase is likely, how does a direct 10x increased based on power savings follow? Less power usage does not mean that the chip can run through more flops in the same amount of time, right?

Re:Google supercharges machine learning tasks with TPU custo... by DigitalJack on Thursday May 19, 2016 @03:03AM (#11728553)
It does if power was the limiting factor in clock speed.
Re:Google supercharges machine learning tasks with TPU custo... by archgoon on Thursday May 19, 2016 @12:03PM (#11731197)
The relationship between clockspeed and power consumption is nonlinear.

http://electronics.stackexchange.com/questions/122050/what-l...

(see graph in the first answer)

Also, it's not known that the TPU have a way to allow to increase the clockspeed arbitrarily, nor is it known whether their architecture is capable of ensuring correctness at arbitrary clock frequencies. Some architectures make assumptions like "The time for this gate to reach saturation is very small compared to the clock frequency, so we'll pretend that it's instantaneous."