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A comment on RISC instruction sets I have known and disliked. Parent comment

Re:RISC instruction sets I have known and disliked by mpe on Monday May 02, 2016 @06:22AM (#11610332)
At least with GNU as you can use %r1, %r2 etc. as an "intrinsic part of the syntax". Which means you can't use a register name where an immediate is expected.

However that doesn't fix the gotcha with r0 being special, that is specified in the ISA. In fact it's that way precisely so you can load an immediate without needing a separate opcode.

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Re:RISC instruction sets I have known and disliked by comex on Monday May 02, 2016 @05:55PM (#11616013)
Huh, never knew that... but I just tried it and GAS (the version Debian installed as powerpc-linux-gnu-as, at any rate) accepted "lwz %r0, %r5(%r0)". Snatching defeat from the jaws of victory...

It would still be a gotcha, but a pretty minor one if messing it up just resulted in an error. I suppose the approach taken by AArch64 and others is preferable, where one register is just completely reserved as constant 0 rather than only in some encodings.

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