There may be an interesting lesson buried here. What if there is efficiency to be gained from drastically reducing the clock rate of processors while at the same time increasing the number of interconnects? A bit like an ultra low power version of the connection machines.

You'd need a sensible way of programming it. Perhaps when 'deep learning' stabilizes a bit there will be commodity neural network chips (there are a few at the moment e.g. http://www.cognimem.com/products/chips-and-modules/CM1K-Chip...).

It's already possible to tweak the process parameters to produce slow-but-efficient chips. I recently saw http://www.ti.com/lsds/ti/microcontrollers_16-bit_32-bit/msp... : 45 microamps/MHz up to 4MHz, runs down to 0.9V. Pair with a suitably low self-discharge battery and it'll run for a decade.

You mean like GPUs have been doing for about a decade now, with their up to 4096 cores?

There's also general-purpose designs like Intel's Polaris[1] 80-core CPU that's close to a decade old (GPUs of the time had 320 cores, so a modern Polaris might scale to 1024 cores).

Making neuron-like massively parallel hardware is one thing, making software to run on it another – we seem to have misplaced the source code to the human consciousness somewhere, alas, and reverse engineering is taking its time.

[1]: https://en.wikipedia.org/wiki/Teraflops_Research_Chip

There is more than one way to skin a cat. Somehow, the heat problem needs to be solved.

Perhaps what would help is to store energy locally, like our brain. Each cell has its own store of ATP, so a constant feed of ionic current is not needed.

That ATP has to come from somewhere though. In cells the ultimate source is usually glucose. So you'd still have to supply some source of energy, in one way or another.