Re:Sort Faster with FPGAs
by hamiltonkibbe on Wednesday January 20, 2016 @06:00PM
(#10942070)
Yeah I was thinking the same thing, just compare all the registers to the value of the next item @posedge_clk and use that bit to tell the registers whether or not they need to shift their value into the next register. It replaces the `memmove()` (the abstract concept) with a single cycle shift
[ Parent
| on HN ]
Re:Sort Faster with FPGAs
by theocean154 on Thursday January 21, 2016 @03:28AM
(#10944059)
The benefit of my way is that you get pipelining (which lets you maintain O(1) throughput without having a fill/flush cycle), as well as better scaling (due to said pipelining) and better energy usage due to smaller fanout.