Good write-up as well. I remember there were two things in the past that excited the heck out of me wrt FPGA's. The first were papers in the late 90's or so showing semi-automatic partitioning of an application between a CPU and a FPGA w/ HLS for the FPGA. Their results were pretty cool. I envisioned something like that would be great for the day the FPGA was practically sitting right on the CPU.

The other thing came from my old, favorite, supercomputing vendor: SGI. They used to blow my mind repeatedly with how they did hardware. On the Altix NUMA systems, they had an option called RASC nodes that basically added 2 FPGA's plus QDR RAM to the system. Like everything else, the FPGA's attached to the shared memory bus to operate on whole memory directly with microseconds latency and several GB/s bandwidth. Not sure if modern FPGA's are sitting on the memory bus inexpensively but RASC's performance/integration showed it's a great idea.

So, those were my two fun points on the subject. The next will probably be if I land a Pico Computing desktop w/ some high-end FPGA's or if Archipelago gets closer to mature FPGA architecture. Either have much potential. :)