Re:You Can Do Any Kind of Atomic Read-Modify-Write Operation
by vardump on Thursday October 08, 2015 @01:15PM
(#10354188)
That's interesting. Any references about this? What about ARM CPUs?
Re:You Can Do Any Kind of Atomic Read-Modify-Write Operation
by exDM69 on Thursday October 08, 2015 @01:27PM
(#10354306)
See Intel Programmer's manual (vol 3a iirc) about pause, monitor and mwait. Not sure about ARM, that architecture has different rules of cache coherence and no hyperthreading and you need to add explicit memory barriers.
When spinning on atomics, the interconnect between cores needs to do a lot of work synchronizing the memory. When adding a pause or monitor instruction, the core will give an opportunity for the other hyperthread in the same core to execute, reducing the amount of churn on the interconnect.
Counterintuitively, adding a "pause" in the spin loop will make the program faster by yielding the CPU core for a few nanoseconds.