Re:Qualcomm Snapdragon, DragonBoard 410c Fire Up at World Ma...
by tbr on Saturday September 26, 2015 @12:35PM
(#10283518)
The board should be prepared for current measurement instrumentation.
Details can be found in the schematics, that finally got published after they were sitting around on them for a few months.
Not publishing the schematics and a couple of other things are actually violating the grand LINARO 96boards compliance spec, but nobody there seems to really give a f...art.
Re:Qualcomm Snapdragon, DragonBoard 410c Fire Up at World Ma...
by jepler on Saturday September 26, 2015 @01:35PM
(#10283724)
I researched the 410c schematic as suggested by tbr. I can measure the input voltage at J1 and measure the input current as a voltage across the .1Ohm resistor r77 or pads 1 and 2 of j10 (both on the bottom side of the board).
Idle, text 15.2v 115mA 1.75W
Idle, X 15.2v 124mA 1.89W
1CPU, X 15.2v ~180mA 2.74W
2CPU, X 15.2v ~240mA 3.65W
4CPU, X 15.2v ~260mA 3.95W
All of my CPU loading scenarios had much more variable current readings, I tried to record the highest value I saw on a multimeter with a ~.5s update time over 10+ seconds.
Incidentally, Dieharder's AES_OFB CRNG (which I don't think uses the AES instruction set on intel) runs at 5e6 randoms per second per thread on dragonboard, compared to 2.5e7 randoms per second per thread on my 3yo 2-core/4-thread i5 laptop at 2.6GHz, to make just one simplistic comparison of CPU speed.
(edited to try to fix formatting)