Branch Prediction and the Performance of Interpreters – Don’t Trust Folklore

Re:Branch Prediction and the Performance of Interpreters – D... by loup-vaillant on Monday August 10, 2015 @09:01AM (#10034256)

There's one caveat: advanced branch prediction is probably not free. It probably costs a bit of silicon, even some energy. It may or may not actually matter (I'm no hardware designer), but if it does, we may have to make some hard choices, like a few more cores vs badass branch prediction.

It may not matter on X86 specifically, where out of order stuff dominates anyway. But it might matter for stuff like the Mill CPU architecture, for which energy efficiency and not wasting silicon is very important.

[ Parent | on HN ]

Re:Branch Prediction and the Performance of Interpreters – D... by acqq on Monday August 10, 2015 @09:09AM (#10034286)

> advanced branch prediction is probably not free

I wouldn't be surprised that in this particular case it's even more about the patents and the possibility to have an advantage to the competition than the silicon. Anybody knows if there is a patent? If there is, who holds it? How much would the CPU which would implement that method cost more?

[ Parent | on HN ]

Re:Branch Prediction and the Performance of Interpreters – D... by seanmcdirmid on Monday August 10, 2015 @09:47AM (#10034511)

If someone identifies an optimum (for performance, efficiency), all competitors are forced to go there to stay competitive. We already have more cores then we know what to do with, and better single core performance is always appreciated, so badass branch prediction probably wins out IF they find that it is useful at all (these days, meaningful gains on single core are difficult to eke out).

[ Parent | on HN ]