sirhcm
Re:Zig (and the Design Choices Within)
on Monday November 10, 2025 @01:59PM (#45879458)
> One extra register is all you ever need, even for an arbitrary parallel move!
This statement, albeit true, is highly misleading. In the example given, you ought to be concerned with parallel assignments not parallel moves. See [0] for more details on the distinction.
Re:Continuous Nvidia CUDA Profiling in Production
on Wednesday October 29, 2025 @02:39PM (#45751188)
Occupancy and RAM utilization are available from static analysis. A sampling profiler would also obviously not be suitable for this always-on profiler case. But reading the counters [0] from the GSP should be cheap.
[0] https://en.wikipedia.org/wiki/Hardware_performance_counter
Re:Continuous Nvidia CUDA Profiling in Production
on Wednesday October 29, 2025 @10:25AM (#45747270)
Cache hit rate is probably the most immediately useful. Although given that this is for always-on profiling maybe this project isn't as geared towards optimizing kernels as I originally thought? In theory reading the counters should be low overhead though.
Re:Continuous Nvidia CUDA Profiling in Production
on Wednesday October 29, 2025 @09:40AM (#45746711)
Does the profiler read any of the GPU's performance counters? Would be super cool to have an open source tool that can capture the same data nsight compute does.