psurge

C++17 has std::hardware_destructive_interference_size which you can use in conjunction with alignas to get this behavior, see https://en.cppreference.com/w/cpp/thread/hardware_destructiv...

I’m not sure whether a single target architecture can (either in theory or in practice) map to hardware with different line sizes. If so, another problem is that the compiler’s idea of the cache line size might not match the hardware’s.

And successfully scaling different peaks requires using different kinds of safety rope. Helpfully, the different ropes all look exactly the same.

My understanding is that DRAM processes are sufficiently different from logic processes that they tend to get dedicated fabs. So then companies like Apple would have to buy fab timeshare from RAM manufacturers that have no incentive (as far as I can see) to let them produce DRAM for less than whatever the bulk pricing is.

Does anyone know of any EPYC 7002 servers, preferably single socket ones, that also support EDSFF E1.L SSDs?

Thanks for pointing this out! I didn't know that C++17 had relaxed this restriction.

I don't think Node can contain a std::vector<Node>, since STL containers cannot have incomplete value types. But maybe I'm misunderstanding you?

I think absl::flat_hash_map<T, std::unique_ptr<Node>> would be worth considering in this application. Keys and values are stored inline, so the memory and creation costs should be comparable to std::vector - https://abseil.io/docs/cpp/guides/container#abslflat_hash_ma...

Aren't the second and third lines of the insert/search implementations superfluous? Casting root to a boolean will never return false, since it is initialized. The insert implementation doesn't update root, so if root were nullptr, insert would be throwing away its work.

I probably screwed something up, but here's a 16 line attempt in Python, where the regex specials are limited to .?:

    def matches(pattern, s):
        if len(pattern) == 0:
            return True
        c = pattern[0]
        assert c not in ("*", "?")
        if len(pattern) > 1:
            if pattern[1] == "?":
                return (
                    len(s) > 0 and c in (".", s[0]) and matches(pattern[2:], s[1:])
                ) or matches(pattern[2:], s)
            elif pattern[1] == "*":
                for i, d in enumerate(s):
                    if c not in (".", d):
                        break
                return any(matches(pattern[2:], s[j:]) for j in range(i, -1, -1))
        return len(s) > 0 and c in (".", s[0])

OK, I just found the FE TDPs listed on the NVidia site (2080 FE: 225W).

The 2080 TDP seems to be 215W rather than 285W (source: https://www.anandtech.com/show/13249/nvidia-announces-geforc...).

Are you sure the FE TDPs are different from the reference spec? I haven't seen that mentioned anywhere else.

The WorldWide Telescope uses this exact idea: http://www.worldwidetelescope.org/docs/worldwidetelescopepro...

There are also other interesting spherical tessellations that could be used - one is implemented in Google's S2 geometry library, the other, HEALPix, is used for astronomical datasets:

http://s2geometry.io/resources/earthcube http://iopscience.iop.org/article/10.1086/427976/pdf