praveenrajus
Re:AI, Lean, and the Future of Formal Verification, with Lean Creator ...
on Saturday October 31, 2026 @01:20PM (#50318055)
works really well for simulators, where you usually don't have an oracle but you do have invariants. e.g. in SPICE the low-freq AC gain has to match the slope of the DC sweep. it's cheap to check and it catches sign errors that look totally fine on a plot
Re:Launch HN: Simantic (YC F26) – Firmware Simulation for AI Agents
on Saturday October 31, 2026 @01:20PM (#50318052)
one spot where pin-level leaks is the ADC. tons of "firmware bugs" are really a big divider that can't recharge the sample cap in time, so readings come out low or depend on the previous channel. even just modeling source resistance vs sampling time would catch a lot of that