linasr
Remote: yes please, but I understand, that it doesn't always work with hardware.
Willing to relocate: no
Technologies: I work with all kinds of embedded systems. I use VHDL, Verilog and SystemVerilog for FPGAs and SoCs. Latest projects were done with Xilinx 7 series devices. Python, embedded C and C++ are also used on daily basis. Latest projects were data acquisition system for vibration analysis and automated test system for semiconductor testing.
Résumé/CV: www.linkedin.com/in/linasr
Email: contact me over LinkedIn please.
Remote: yes please, but I understand, that it doesn't always work with hardware.
Willing to relocate: no
Technologies: I work with all kinds of embedded systems. I use VHDL, Verilog and SystemVerilog for FPGAs and SoCs. Latest projects were done with Xilinx 7 series devices. Python, embedded C and C++ are also used on daily basis. Latest projects were data acquisition system for vibration analysis and automated test system for semiconductor testing.
Résumé/CV: www.linkedin.com/in/linasr
Email: contact me over LinkedIn please.
Remote: yes, but I understand, that it doesn't always work with hardware.
Willing to relocate: no, maybe to Switzerland
Technologies: I am FPGA designer working on algorithms, that need more real time performance than CPUs and GPUs can provide. I have a dedaced experience, started with Altera Quartus, but now work with Xilinx Vivado. I use VHDL and Verilog for design, SystemVerilog for testbenches. Python, embedded C and C++ are used on daily basis. I also write firmware for normal microprocessors and design printed circuit board using KiCad. Notable projects: complete GigE Vision camera and code for cryptomining ASIC.
Résumé/CV: www.linkedin.com/in/linasr
Email: contact me over LinkedIn please.
Remote: yes, but it doesn't always work with hardware
Willing to relocate: not sure yet, maybe Switzerland
Technologies: I am FPGA designer with almost decade experience. I started with Altera Quartus, but now work with Xilinx Vivado. I use VHDL and Verilog for design, SystemVerilog for testbenches. Python, embedded C and C++ are used on daily basis. I also write firmware for normal microprocessors and design printed circuit board using KiCad. Notable projects: complete GigE Vision camera and code for cryptomining ASIC.
Résumé/CV: www.linkedin.com/in/linasr
Email: contact me over linkedin please.
Remote: yes, but it doesn't always work with hardware
Willing to relocate: not sure yet, maybe Switzerland
Technologies: I am FPGA designer with almost decade experience. I started with Altera Quartus, but now work with Xilinx Vivado. I use VHDL and Verilog for design, SystemVerilog for testbenches. Python, embedded C and C++ are used on daily basis. I also write firmware for normal microprocessors and design printed circuit board using KiCad. Notable projects: complete GigE Vision camera and code for cryptomining ASIC.
Résumé/CV: www.linkedin.com/in/linasr
Email: rudalevi [at) gmail (dot} com